Parity SIMMs are 36bits wide and you need an even number of SIMMs
in a machine, ie 72 bits wide providing 64 bits of memory and 8
parity bits.
This is the way Intel chipsets support ECC, there are enough
bits for the memory/DRAM controller to detect a single bit error,
calculate the corrected bit and write it back to memory.
I'm not making this up. Read up on Intel's chipsets on their website.
>
> >
> > In my experience, parity (ECC) memory does seem to cure some strange
> ~~~~~~ ~~~~~
> Please! These are not the same. Parity (unless the marketing types have
> been eating holes in the dictionary) is counting whether the number of
> stored "1" bits is odd or even. ECC is Error Checking and Correcting,
> and implies at least the capability to detect and correct all single bit
> errors AND to detect all double-bit errors AND to detect an all-zeros or
> all-ones (counting the redundant bits, of course) condition.
The logic is moved from the SIMM to the memory controller.
>
> --
> ted@psg.com ted@wimsey.com http://psg.com/~ted/ (Ted Powell)
> "Circular logic will only make you dizzy, Doctor!"
> --Perpugilliam Brown
>
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